Tags: sebjan/linux
Tags
ARM: LPAE: Invalidate the TLB for module addresses during translation… … fault During the free_pgtables() call all user and modules/pkmap entries are removed. If a translation fault for the modules/pkmap area occurs before we switched away from the current pgd, do_translation_fault() would copy the init_mm pud into the user pud. There is a small window between pud_clear() and pmd_free_tlb() in free_pmd_range() where the pud entry was cleared but the TLB has not been invalidated yet and the CPU may have cached the original (valid) pud entry in the TLB. A scenario like below would get stuck in continuous prefetch abort: 1. Current process exiting. The modules pmd entries not populated 2. exit_mmap() -> ... -> pmd_free_tlb() 3. pud_clear() for the 1GB pud containing user stack and modules (no TLB invalidation yet) 4. Interrupt -> module interrupt routine 5. Level 2 (pmd) translation fault occurs when executing the module interrupt routine. The CPU previously cached (TLB) the old valid pud value for the modules area, so we don't get a level 1 translation fault 6. do_translation fault() copies the pud_k into the pud 7. Linux returns to the faulty instruction. Goes back to 5 At point 7, since the CPU still has the old pud value, it goes back to point 5 and never gets out of this loop. With this patch, the stale pud TLB entry is invalidated after point 6 and the subsequent prefetch abort doesn't occur. Reported-by: Tony Thompson <Anthony.Thompson@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
UBUNTU: Ubuntu-3.0.0-1280.6 Signed-off-by: Sebastien Jan <s-jan@ti.com>
UBUNTU: Ubuntu-3.0.0-1280.5 Signed-off-by: Sebastien Jan <s-jan@ti.com>
UBUNTU: Ubuntu-3.0.0-1280.4 Signed-off-by: Sebastien Jan <s-jan@ti.com>
UBUNTU: Ubuntu-3.0.0-1280.3 Signed-off-by: Sebastien Jan <s-jan@ti.com>
UBUNTU: Ubuntu-3.0.0-1280.2 Signed-off-by: Sebastien Jan <s-jan@ti.com>
UBUNTU: Ubuntu-3.0.0-1280.1 Signed-off-by: Sebastien Jan <s-jan@ti.com>
UBUNTU: Ubuntu-3.0.0-1280.1 Signed-off-by: Sebastien Jan <s-jan@ti.com>
OMAP: DSS2: DISPC: Fix minimum PCD value The current driver had a hardcoded minimum value of 2 for pixel clock divisor (PCD). This doesn't seem to be right. OMAP4 TRM says that PCD can be 1 when not downscaling, and inverted pixel clock (IPC) is off. OMAP3 TRM says the same, but also in the register descriptions that PCD value 1 is invalid. OMAP2 TRM says PCD 2 is the minimum. OMAP2 is still untested, but for both OMAP3 and OMAP4 PCD of 1 seems to work fine. This patch adds a new DSS feature, FEAT_PARAM_DSS_PCD, which is used to find the minimum and maximum PCD. The minimum is set to 2 for OMAP2, and 1 for OMAP3/4. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
PreviousNext