I'm an electronics and communication engineering student at PES University, with a major in ECE and a minor in CSE. My passion lies in hardware design and modeling digital circuits. I primarily work with Verilog HDL and am expanding my skill set to include SystemVerilog for advanced verification.
I'm an Electronics and Communication Engineering student at PES University, with a minor in Computer Science. My passion lies in digital system design, embedded development, and the intersection of hardware and intelligence.
I enjoy building systems from the ground up—whether it's writing Verilog for FPGA logic, modeling architectures in SystemC, or developing C/C++ firmware for microcontrollers. I'm also exploring how AI and machine learning can enhance hardware design, especially in areas like RTL verification and robotics.
Most of my time goes into experimenting with low-level hardware, open-source contributions, and bringing real-world interactivity to circuits and code. I love the process of turning abstract ideas into physical, working prototypes.
- Hardware & Design: Verilog, SystemVerilog, SystemC, Cadence Virtuoso, Vivado, ModelSim
- Embedded Systems: C/C++, ESP32, Raspberry Pi, UART/I2C/SPI, RTOS basics
- Programming & Tools: Python, Bash, PyEDA, PyTorch, OpenCV, Git, Linux
- Other Interests: FPGA acceleration, hardware security, humanoid robotics, signal processing
- Soft Skills: Problem-solving, system-level thinking, cross-domain curiosity
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Verilog 8 hrs 45 mins ████████████▓░░░░░░░░░░░░ 35.0%
C++ 6 hrs 30 mins ██████████▒░░░░░░░░░░░░░░ 26.0%
Python 4 hrs 15 mins ████▒░░░░░░░░░░░░░░░░░░░░ 17.0%
SystemC 3 hrs 20 mins ███▒░░░░░░░░░░░░░░░░░░░░░ 13.3%
Bash 2 hrs 10 mins ██░░░░░░░░░░░░░░░░░░░░░░░ 8.7%
