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  • Paris, France

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MatthieuMichon/README.md

Hi, I’m Matthieu

As an Electrical Engineer, I am focused on high-performance digital design using FPGAs. I specialize in delivering measurable impact and value by translating complex algorithms into efficient hardware implementations, accelerating pipelines, and optimizing the development flow from disussing challenges / opportunities to production.

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  1. aoc-rtl aoc-rtl Public

    Advent on Code on FPGA

    SystemVerilog 1

  2. vivado_jtag_run-test-idle vivado_jtag_run-test-idle Public

    Verification of the behavior of the `run_state_hw_jtag -state IDLE IDLE` command

    SystemVerilog 1

  3. fpga-fw-manifest fpga-fw-manifest Public

    PoC for shoehorning *JSON data* into a FPGA firmware and extracting it using generic JTAG commands

    Tcl 1

  4. xlnx_fpln xlnx_fpln Public

    Generate and build Vivado projects for all supported parts

    Tcl 1

  5. fpga-jtag-axi-demo fpga-jtag-axi-demo Public

    Basic JTAG / AXI demonstration on Xilinx's FPGA.

    Tcl 5 1

  6. zcu106-silent-fan zcu106-silent-fan Public

    Minimalist design enabling low-noise fan operation

    SystemVerilog