MIPS Processor Simulation Project

Program that simulates MIPS Processor and Memory Allocation using Active-HDL IDE

Name		Name	Last commit message	Last commit date
Latest commit History 35 Commits
Assembler		Assembler
ADD.v		ADD.v
ALU.v		ALU.v
ALU_control.v		ALU_control.v
ALU_control_unit.v		ALU_control_unit.v
ControlUnit.v		ControlUnit.v
D_memory.list		D_memory.list
DataMemory.v		DataMemory.v
I_memory.list		I_memory.list
InstructionMemory.v		InstructionMemory.v
MIPS.v		MIPS.v
MUX.v		MUX.v
PC.v		PC.v
README.md		README.md
RegisterFile.v		RegisterFile.v
SLL2.v		SLL2.v
SignExtension.v		SignExtension.v
addpc4.v		addpc4.v
clock.v		clock.v
concatenation.v		concatenation.v
mux2to1.v		mux2to1.v

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