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Commits on Aug 12, 2021

• Merge pull request #490 from allexoll/dev

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  Dolu1990

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Commits on Aug 11, 2021

• Merge branch 'SpinalHDL:dev' into dev

  allexoll

  authored
  fa3a27b

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• added addressWidth checking to Apb3Decoder

  alexismarquet

  committed
  b4d9758

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• Fix fiber async core prepoptasks

  Dolu1990

  committed
  c8b946d

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• Fix #489 avoid Component.rework to execute afterElaboration tasks

  Dolu1990

  committed
  dbed061

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• fix one issue of #488 (Vec.apply(UInt).apply(ranged access) := xxx can now be used)

  Dolu1990

  committed
  e08d92e

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• A Bool ? T otherwise T

  Dolu1990

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  8be35fc

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Commits on Aug 9, 2021

• Fix Mem.1rw mixed width blackboxing

  Dolu1990

  committed
  d3dbfc9

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Commits on Aug 6, 2021

• usb device wip

  Dolu1990

  committed
  61b0d9d

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Commits on Aug 5, 2021

• Merge branch 'verilatorBinariesCache' into dev

  Dolu1990

  committed
  d91f468

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• Increase VerilatorCacheTester time

  Dolu1990

  committed
  6609942

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• Merge pull request #477 from jonnykl/verilatorBinariesCache

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  Dolu1990

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  0ed9a54

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Commits on Aug 3, 2021

• SpinalSimConfig.compile do not mutate the config anymore

  Dolu1990

  committed
  216d91a

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Commits on Aug 2, 2021

• fix bug: use separate cache path for verilator cache test

  jonnykl

  committed
  0ad212b

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• add option to specify the path of the cache

  jonnykl

  committed
  37c6bbd

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• add test for the verilator cache

  jonnykl

  committed
  f4e6a07

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• fix for old scala versions (before 2.13)

  jonnykl

  committed
  62c41bb

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Commits on Jul 30, 2021

• Fix ClockDomainResetGenerator.powerOnReset default value

  Dolu1990

  committed
  8cfaa15

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Commits on Jul 29, 2021

• use hash as cache entry directory name

  jonnykl

  committed
  8c4510e

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• Add support to give name to Option[Nameable]

  Dolu1990

  committed
  f694a75

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• merge Data.keep and data.noSpinalPrune. keep take over

  Dolu1990

  committed
  ffb781a

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• Add Data.noSpinalPrune

  Dolu1990

  committed
  69b7074

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Commits on Jul 28, 2021

• Merge pull request #484 from jijingg/patch-1

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  Dolu1990

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  49f766a

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• Add SpinalReport.printRtl

  Dolu1990

  committed
  b76bc88

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• ValCallbackRec now handle Set

  Dolu1990

  committed
  7d6735b

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• SpinalSimUsnHost remove fastWave

  Dolu1990

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  e2ef83c

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• BmbSyncRemover now support multiple sources

  Dolu1990

  committed
  3e42650

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• Bmb inv/sync param rework wip

  Dolu1990

  committed
  0257324

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• coscup sync

  Dolu1990

  committed
  d0c60ec

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• enumdefine.v issue fix

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  jijingg

  authored
  7fe7181

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Commits on Jul 27, 2021

• usb device memory map ajustement. Things seems to work on hardware !

  Dolu1990

  committed
  65358f2

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• Fix #481

  Dolu1990

  committed
  e9a8839

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Commits on Jul 26, 2021

• use unrenamed workspace name for verilator caching

  jonnykl

  committed
  0765b06

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• cache compiled static lib instead of final shared libary including uniqueId

  jonnykl

  committed
  6f37637

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• use all rtl sources for hash generation

  jonnykl

  committed
  43d0ec9

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