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Commits on Dec 16, 2025

• Verilog: format struct expressions

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Commits on Dec 15, 2025

• Merge pull request #1489 from diffblue/dependabot/github_actions/actions/cache-5

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• Merge pull request #1491 from diffblue/dependabot/github_actions/actions/download-artifact-7

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• Merge pull request #1490 from diffblue/dependabot/github_actions/actions/upload-artifact-6

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• Bump actions/download-artifact from 6 to 7

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• Bump actions/upload-artifact from 5 to 6

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• Bump actions/cache from 4 to 5

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• netlist: split up convert_trans_to_netlistt::map_vars

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• aig_nodet constructors

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• Merge pull request #1483 from diffblue/smv-complex-identifier

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• Merge pull request #1485 from diffblue/show-module-class

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• Merge pull request #1481 from diffblue/fix-bitand-bitor

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• Merge pull request #1482 from diffblue/use-smv_module_instance_typet

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• Merge pull request #1484 from diffblue/smv-parse-tree-lhs-rhs

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• Merge pull request #1486 from diffblue/boolean-reset

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Commits on Dec 14, 2025

• ensure reset constraint is Boolean

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Commits on Dec 13, 2025

• factor out module list output

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• SMV: do not merge identifiers in the parser

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• SMV: add lhs() and rhs() helper methods

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• Use smv_module_instance_typet

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• Fix four-valued | and &

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Commits on Dec 12, 2025

• Merge pull request #1478 from diffblue/assign_next1

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• Merge pull request #1479 from diffblue/show-modules-smv

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• Merge pull request #1480 from diffblue/verilog-bitwise-tests

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• Tests for Verilog bitwise operators

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Commits on Dec 11, 2025

• Implement --show-modules for SMV

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• SMV: test for next(...) in rhs of ASSIGN next(...)

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• Merge pull request #1476 from diffblue/aval-bval-zero-extend

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• Merge pull request #1477 from diffblue/smv-no-next-allowed

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• SMV: check for cases of disallowed next

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• Verilog: aval/bval encoding for zero extension

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• Merge pull request #1468 from diffblue/self1

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• KNOWNBUG test for SMV's self

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• Merge pull request #1475 from diffblue/smv-netlist-iff

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• Merge pull request #1474 from diffblue/smv-divmod-int

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