Added detailed instructions to the user guide on how to build
using CMake for single-ISA configurations.

Resolves: COMPMID-8550

Signed-off-by: Dennis Wildmark <dennis.wildmark@arm.com>
Change-Id: Ib402da1dccecf0208a38061465e64e7a47134a92

Depthwise convolution tests for 5x5 filters were failing from time to time with small differences. The relative tolerance was %2, but running this test 10M times revealed the errors can be larger depending on how much the numbers are close to zero. Therefore, we added an absolute tolerance for the results that's been tested 10M times.

Resolves: COMPMID-8379
Change-Id: Iaa997b0208332bb39e3d30ad7991fc4627f9015a
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

While compiling with clang v20+, it was emitting -Wdeprecated-literal-operator, and in future versions, this warning can be emitted as an error.

Since we don't want to change the third party, we fixed this inside support/Half.h in this commit: afd78dd

However, there is another direct inclusion of  half/half.hpp inside tests/validation/CPP/LUT.cpp, and we could potentially hit this issue there again. Currently, we don't because of possible transitive inclusions including support/Half.h before we explicitly include half/half.hpp. But, relying on this is not stable and we'd like to use support/Half.h for every usage/inclusion of half.hpp members.

You can easily reproduce an error by moving the include of half.hpp to the top, confirming our hypothesis that the error was suppressed only because it was suppressed through a transitive support/Half.h inclusion.

Partially Resolves: COMPMID-7924

Change-Id: I204b14eebabe27b06eebf3024938e41748500785
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Change-Id: I706ffb9c8b19c9afbb378accbfa88e2a807867ee
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

This patch adjusts the tolerances in some of the CpuGemmAssemblyDispatch tests. It's been practically tested with ~1K iterations in RunLarge test suite.

Resolves: COMPMID-8465
Change-Id: I64db7d6d8e767410cc99cf4e24b6f3ac5333710c
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Int8 x Int8 -> f32 convolution is picking random scales as if the output is Int8/UInt8, too. In fully quantized convolutions, given input & weight quantizations, we pick the dst quantization info in such a way that the results don't saturate in the 8-bit integer representation.

In f32 outputs, the bias is f32, too, and we don't have a dst quant. info to adjust. In this case, randomly chosen input & weight quant. infos might cause large multiplication outputs. But, the random bias is not chosen according to this, and this causes rounding errors.

The situation usually happens when one of the output values w/o added bias is close to 0. Because the large multiplication output is cancelled by the offset contribution, which makes the output 0, and the result should be equal to bias. However, the bias is added in the assembly kernel before the offset contribution is added to the multiplication output. If the multiplication output is much larger than the bias, it results in big rounding errors int the final sum. When the offset contribution cancels the multiplication output, the rounded bias becomes equal to the result. However, the rounding error sometimes exceeds the tolerance in such cases. This is not healthy as increasing tolerance could result in ignoring the bias and future errors related to that all together.

This commit adjusts the input and weight quantization info to prevent such cases.

Resolves: COMPMID-8660

Change-Id: I554b6c9faabfdc1d3b755487dbe253f9658d03e2
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Ignoring .txt files in version control is harmful than it's useful because we have several .txt files in our source tree (e.g. CMake related ones) and needs special treatment and license files in our third parties. These get ignored w/o us knowing about them unless they've been included in the tracking explicitly.

This patch removes *.txt and special treatment required by CMakeLists.txt from .gitignore.

Partially Resolves: COMPMID-8629

Change-Id: Ib5da1959e3a172baf48ea3ebb07ab1649f473f67
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Change-Id: I8518969c26f0e391958f7ecea2806e9ed7da3292
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

This patch fixes a potential overflow raised by clang-cl when compiling CpuIsaInfo.cpp. The compiler uses 32-bits for unsigned long, and therefore 37-bit shift overflows. This variable is only defined in this context and not used. So, the fix doesn't impact any current problems, but in case the same variable is used somewhere else in the future where unsigned long is 32-bits or is not promoted to 64-bit integer in compile-time, this fix will ensure that it's treated as a 64-bit int.

Change-Id: I22c0d192f9664bb5f92e85a52ec4f57bcb32d829
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Change-Id: Ic097b1b3c690d857b14e37f7278d3d7a8c8b40ca
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Up from v0.5.0.

Resolves: COMPMID-8629
Signed-off-by: Andreas Flöjt <andreas.floejt@arm.com>
Change-Id: I366dcfc309a0ae35906f8ce3b46813b9042caf6a
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

…L kernel in CL backend:

- Correct heuristic and validation conditions
for selecting the FP16 MMUL Reshaped RHS kernel.

- Remove invalid test case for
FP16 MMUL Reshaped RHS kernel

Partially resolves: [COMPMID-8727]

Signed-off-by: Omar Al Khatib <omar.alkhatib@arm.com>
Change-Id: Ib594f2100bf59f13b1233fc68be7b032c1a720fc

TensorShape and Dimension classes's collapse and total_size calculations should have been using size_t or the template T , but the initial value used in std::accumulate is an integer, and it's always 32-bits. This prevents us calculating number of tensor elements correctly.

This also prevents us from reliably using ARM_COMPUTE_RETURN_ERROR_ON_SIZE_UNSUPPORTED(..) macro.

Other misuses of this call have also been corrected. but they are not bugs for library users.

Partially Resolves: ARMCL-1247
Relates to: COMPMID-8646

Change-Id: I81976e62316786b032b6c1aae210c7dcdcf8ae34
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Previously, we added a size validation check for most Cpu operators. This was to prevent accepting configurations that may not have been supported because of their large sizes. It was done because of a reported bug: ARM-software#1193

That fix was a blanket measure to prevent this happening in any operator in the library because the usage of size_t, int, unsigned int is in a mixed situation. However, implementing this measure means not supporting some configurations that we used to support in favor of preventing any future related bugs.

This patch introduces an alternative check and replaces the old one. It's still expected to prevent configs that might be problematic, but it's not as strict as it was in the original patch, providing the same level of security.

Resolves: ARMCL-1247
Partially Resolves: COMPMID-8646

Change-Id: Ib4a17b4d1b8113fb34c93676f80262f09b7ace82
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Previously ignored commit, ac03c76, was not correct. It was only changing the pre-commit configuration. The formatting patch was the commit before that.

Change-Id: I96ec30af240039a15004f9d28625375371459fbd
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Test framework was being built even though it's not used. This patch changes the build system so that it's only built when the framework is used.

Change-Id: Ia3fdc21180e85b3d131a5c6b352a2a5b379cd342
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

We add another level of logging between ERRORS and INFO/DEBUG because we print skipped tests with INFO level logging and they don't appear in CI. Reporting if they're skipped or not is useful when trying to understand if the CI is running the correct set of tests or not on a given hardware. INFO level debugging is too heavy for CI output because it prints every tensor value mismatch if there are failing tests and this could be miliions, thus it's not a good option.

After this commit, we'll also change test skip reports to warning level in various places and also change the CI to log at warning level instead of error level.

Change-Id: I4de2859b6987778d9b228fd96c2336c4ce056079
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

Previously, we're printing this at DEBUG logging level and they weren't appearing in CI logs. This patch will use the WARNINGS log level. This patch will be accompanied with a CI patch that changes the CI logging level to WARNING instead of ERRORS.

Change-Id: I9fc7072f11fd183d0d5356ef2bbff2c91356e449
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>

The ARM architecture defines distinct features for each outer product
data type.  Add these features, and detection code for bare metal (via
sysregs), Linux (via HWCAP2) and macOS (via sysctl).  For Windows,
assume that anything supporting SME also supports these features.

Signed-off-by: David Mansell <David.Mansell@arm.com>
Change-Id: Ia236714d51bb935fa366553dc9ac193d50c8d18a

Add SME versions of most SME2 kernels.

As a side effect, synchronize with the latest upstream arm_gemm repo.
This includes deleting a substantial amount of dead files that weren't
being used for anything.  arm_gemm include files are now stored in a
slightly different place, so various other places that refer to these
are updated to match.

Partially Resolves: COMPMID-8788, ARMCL-1239
Signed-off-by: David Mansell <David.Mansell@arm.com>
Change-Id: Iaa6f5a8caa4109098b8b5f9173df0909a4e940d6
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>